Enhanced matrix-based error correction coding techniques
for embedded memories

Enhanced matrix-based error correction coding techniques
for embedded memories

Correction masking technique
Error correction code
H-matrix
Memories single bit upsets
Multiple bit upsets

Memories play a very important role in computing systems due to the continuous
advancements in technology. They are used to store data that is used for proper
system operations. Memory architectures that are more intricately designed are
more prone to radiation-induced errors such as single bit upsets (SBU) and multiple
bit upsets (MBU). Error correction codes (ECC) are used to recover the
corrupted data that are stored in memories. H-matrix-based ECC is the commonly
used ECC for memories. On the other side, the correction masking (CM)
technique was added to ECC to mask the correctable error patterns. CM technique
protects the error-free bits while correcting erroneous bits. In this paper,
optimized H-matrices are presented. These matrices are used to design an ECC
with the CM technique to correct 2-bit to 7-bit adjacent errors. The result shows
there is a reduction in the power of 2, 3, and 4 adjacent bit errors by 19.009%,
4.615%, and 27.934% respectively.

Jammula Shivani, Mandadi Shankar Teja, Manickaraj Vinodhini

Journal homepage: http://journal.uad.ac.id/index.php/TELKOMNIKA

May 26, 2024

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